Memory Optimization, Hardware/Software Co-design, Behavioral Synthesis, Low Power Design, Memory issues in System Design, Post-silicon Validation, Application-specific Architectures, Compilation for Embedded Systems, Low Power and Energy-efficient Computing, High-level Synthesis
Personal Information
Prof Preeti Ranjan Panda
Male
Department of Computer Science and Engineering Indian Institute of Technology Delhi, Hauz KhasNew Delhi, Delhi, India - 110016